Conference Schedule
The following is a tentative conference schedule, and is subject to change.
| Monday, September 13th | |
| 8:00 – 10:00 a.m. | Registration & Continental Breakfast |
| 10:00 a.m. – 12:00 p.m. |
Plenary Session I 1.1: Driving eGaN Transistors for Maximum Performance, Alex Lidow, CEO, Efficient Power Conversion 1.2: Maximizing Energy Output of Energy Harvesting Power Supplies with Adaptive Power Management, Peter Spies, Group Manager, Fraunhofer Institute 1.3: The Future of Digital Power, Chris Young, Sr. Manager Digital Power Technology, Intersil Zilker Labs 1.4: Novel Micro Power Source Based on Fuel Cell Technology, Lonnie Johnson, Founder, Johnson Research and Development Co. Inc. & Excellatron Solid State LLC |
| 12:00 – 1:30 p.m. | Lunch Break (on your own) |
| 1:30 – 3:00 p.m. |
Session 2 - Enabling the Smart Grid 2.1: A Reliable Smart Grid and High Efficiency UPS Improves Data Center Efficiency, Mark Szalkus, Power Quality Marketing and Commercialization Manager, GE Digital Energy 2.2: Uniform Test Method for Quantifying Multiple Shed Levels of Demand Response Assets, Chuck Thomas, Electric Power Research Institute 2.3: A New Method of Monitoring and Reporting Average Input Power, Robert V. White, Chief Engineer, Embedded Power Labs |
| 3:00 – 3:15 p.m. | Networking Break |
| 3:15 – 4:45 p.m. |
Round Table Discussion What will be the Most Important Driver for the Power Electronics Industry in the Future: Architectures, Topologies, Materials or Applications? Alex Lidow, CEO, Efficient Power Conversion |
| 4:45 – 7:00 p.m. |
Exhibit Hall Opens Welcome Reception (hosted in exhibit hall) |
| Tuesday, September 14th | ||
| 8:00 – 9:00 a.m. | Registration & Continental Breakfast |
|
| 9:00 – 11:00 a.m. |
Plenary Session II 3.1: Digital Power Finds a Place in the Sun, Dave Freeman, Systems Engineering Manager, Texas Instruments 3.2: Power Technology and Pushing the Technology Limit, Randy Malik, Senior Technical Staff Member, IBM 3.3: Nano to Zero - Implementing a Low Power Wireless Sensor Node with Zero Sleep Power, Harry Ostaffe, Director, Marketing & Business Development, Powercast, and Jason Tollefson, Product Marketing Manager, Microchip Technology, Inc. 3.4: Power Converter Miniaturization Trends - Power Supply in Package (PSiP) and Power Supply on a Chip (PwrSoC), Arnold Alderman, Anagenesis Inc; Finbarr Waldron, Tyndall National Institute; John Slowey, Power Electronics Research Laboratory; Raymond Foley, Power Electronics Research Laboratory; Cian O'Mathuna, Tyndall National Institute |
|
| 11:00 a.m. – 1:00 p.m. | Exhibits Open, Hosted Lunch (hosted in exhibit hall) |
|
| 1:00 – 3:00 p.m. |
Session 4 - Applications of Digital Power 4.1: IBA System Efficiency Optimization - A Case Study, Magnus Karlsson, Electronic Design Engineer, and Torbjörn Holmberg, Project Manager, Ericsson Power Modules 4.2: Designing for Transient Loads that Exceed Thermal Design Limits, David Williams, Director of Systems Engineering, CHiL Semiconductor Corp. 4.3: Performance Investigation of Digital Bridgeless PFC, Sean Xu, System and Applications Engineer, Texas Instruments 4.4: Digital Filters for Power Supply Applications, Chris Young, Sr. Manager Digital Power Technology, Intersil Zilker Labs |
Session 5 - Implementing Energy Harvesting Solutions 5.1: Advanced Energy Harvesting Architectures Using Embedded Energy and Energy Processors, Jeff Sather, VP Customer Solutions, Cymbet 5.2: Slow and Steady Wins the (Low Power) Race, Bhanu Kapoor, Founder, Mimasic 5.3: Sleeping 99% of the Time - Extremely Low-Power Embedded Systems, Mark Buccini, Director, Texas Instruments 5.4: Perpetually Powered RF Pedometer Powered by Micro-Energy Cells Combined with Energy Harvesting, Frank Roberts, Sr. Applications Engineer, Infinite Power Solutions |
| 3:00 – 3:15 p.m. | Networking Break |
|
| 3:15 – 4:45 p.m. |
Session 6 - Tools and Techniques 6.1: Chip and System-Level Power Considerations for Energy-Efficient Embedded Designs, Trenton Henry, Systems Engineer, Silicon Laboratories 6.2: Design Challenges of Digital Signal Controllers for Digital Power Applications, Raul Hernandez, Applications Engineer, Freescale Semiconductor 6.3: Designing Instrumentation for Data Center Power Reporting, Jerry Steele, Strategic Applications Engineer, National Semiconductor Corp. |
Session 7 - Power System Design 7.1: High Input Voltage Power Supply Design, Vipine Bothra, STMicroelectronics 7.2: Model Based Design for Digital Power Control, Pete Darnell, President, Visual Solutions, Inc. 7.3: Advanced "1/32-brick" High Power Density DC-DC Solutions, Dave Berry, Applications Engineer, Vicor |
| Wednesday, September 15th | ||
| 8:00 – 9:00 a.m. | Registration & Continental Breakfast |
|
| 9:00 – 11:00 a.m. |
Session 8 - Optimizing Converter Performance 8.1: Power Saving Control Strategies and Their Implementation in DC-DC Converter for Data and Telecommunications Power Supply, Rais Miftakhutdinov, Texas Instruments, Inc. 8.2: Advanced MOSFET Silicon and Packaging Enables New Levels of Power Density in Synchronous Buck Designs, Mike Speed, Fairchild Semiconductor 8.3: Transmission Line Noise Issues and Solutions, Frank Kern, CHiL Semiconductor Corp. 8.4: Digital DC-DC: Ready for Prime Time?, Allen Rozman, Director of Product Management, Lineage Power |
Session 9 - Power Electronics Applications 9.1: Coordinated Circuit Protection Options for LED Lighting, Matt Williams, Global Applications Engineering Manager, Tyco Electronics 9.2: Battery Support Supercapacitors Extend Battery Performance, Life and Reduce Cost, Mark Gebbia, Director of Engineering/Quality Assurance, Illinois Capacitor 9.3: Ultra-Low-Power Conversion and Management Techniques for Thermoelectric Energy Harvesting Applications, Jerry Fleming, Senior Research Engineer, Luna Innovations 9.4: Power Management for Embedded Microcontrollers, Jonathan Dillon, Sr. Applications Engineer, Microchip Technology, Inc. |
| 11:00 a.m. | Conference Adjourns |
|
Media Sponsors
|
|
|
